Principal R&D Engineer
Company: Synopsys
Location: Austin
Posted on: January 26, 2025
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Job Description:
We Are:At Synopsys, we drive the innovations that shape the way we
live and connect. Our technology is central to the Era of Pervasive
Intelligence, from self-driving cars to learning machines. We lead
in chip design, verification, and IP integration, empowering the
creation of high-performance silicon chips and software content.
Join us to transform the future through continuous technological
innovation.You Are:We are seeking an experienced, highly motivated,
and high-caliber individual to join our team as an R&D Engineer
in Austin, TX. You are a visionary with a strong technical
background in system frontend architecture, high bandwidth
peripherals & protocols, timing, post-silicon characterization, and
DFx domains. You have a proven track record of working on complex
projects and delivering innovative solutions. Your ability to
understand business priorities and translate them into technical
tasks is exceptional. You thrive in collaborative environments and
possess excellent communication and interpersonal skills, enabling
you to work effectively with both internal teams and external
customers. Your extensive experience in optimizing performance,
power, and area (PPA) and improving execution schedules sets you
apart. You are passionate about continuous learning and staying
ahead of industry trends, always looking for opportunities to
enhance existing products and create technical roadmaps for future
innovations.What You'll Be Doing:Work on architecture & IP
development projectsUnderstand business priorities and break them
down into technical tasksIdentify enhancement opportunities and
cost optimizations for existing productsDevelop novel ways to
access on-chip Test, Debug & SLM data via high bandwidth and
cost-efficient solutionsDeploy new solutions into test chips and
post-silicon characterizationCreate technical roadmaps for IP
developmentThe Impact You Will Have:Enable High-bandwidth test &
SLM access with Semiconductor and ATE industry partnersEnable fast
integration of intelligent in-chip sensors and analyticsOptimize
performance, power, area, schedule, and yield of semiconductor
productsEnhance reliability of technology products across various
applicationsContribute to the development of differentiated
products with reduced riskDrive continuous innovation in the SLM
Hardware product portfolioSupport Synopsys' leadership in chip
design and verificationWhat You'll Need:BS or MS degree in
Electrical Engineering with 15+ years of relevant industry
experienceStrong knowledge of Frontend Architecture and Digital
designHands-on expertise in high bandwidth protocols like USB,
PCIE, and EthernetExperience in optimizing PPA achieved pre-silicon
and realized post-siliconProven ability to improve execution
schedulesWho You Are:Possess strong system-design and
microarchitecture skillsHands-on experience with HSIO protocols
like PCIE and USBExperience with light weight CPU or
microcontroller designsKnowledge of DMA concepts and DMA IP
designsFamiliarity with AXI and advanced AMBA/on-chip bus
protocolsExperience in DFT/DFx technologies and Scan, ATPG, BIST
concepts is a strong plusStrong RTL design and coding experience in
Verilog, System Verilog, VHDLDemonstrated expertise in
productization of advanced technologiesExposure to prototyping new
technologies via FPGA prototyping and/or EmulationThe Team You'll
Be A Part Of:You will be part of the rapidly expanding
Hardware-Analytics and Test (HAT) group, working on the development
of Debug, Monitoring and Access solutions within the SLM Hardware
product portfolio. This team is dedicated to addressing the
increasing demand for test and monitoring data collection per chip,
ensuring scalability and commercial viability of data access
solutions. Collaborate with a talented group of professionals
focused on innovation and excellence in semiconductor lifecycle
management.Rewards and Benefits:We offer a comprehensive range of
health, wellness, and financial benefits to cater to your needs.
Our total rewards include both monetary and non-monetary offerings.
Your recruiter will provide more details about the salary range and
benefits during the hiring process.#LI-DP1
Inclusion and Diversity are important to us. Synopsys considers all
applicants for employment without regard to race, color, religion,
national origin, gender, sexual orientation, gender identity, age,
military veteran status, or disability.
In addition to the base salary, this role may be eligible for an
annual bonus, equity, and other discretionary bonuses. Synopsys
offers comprehensive health, wellness, and financial benefits as
part of a of a competitive total rewards package. The actual
compensation offered will be based on a number of job-related
factors, including location, skills, experience, and education.
Your recruiter can share more specific details on the total rewards
package upon request. The base salary range for this role is across
the U.S.
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Keywords: Synopsys, Austin , Principal R&D Engineer, Engineering , Austin, Texas
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